1. Field of the Invention
This invention is in the field of manufacturing stable, low resistance contacts in integrated semiconductor circuits employing a substrate of silicon with an interconnecting layer consisting of aluminum or an aluminum alloy which is connected to the diffused silicon regions of the circuit by means of an intermediate layer including a metal silicide.
2. Description of the Prior Art
In modern very large scale integrated circuits (VLSI) that are characterized by minimal structures of about 2 microns, the contacts between the aluminum interconnections and the monocrystalline or polycrystalline silicon regions situated below the interconnections are generally produced by forming contact holes which are etched in an insulating layer, for example, in an approximately 1 micron thick silicon dioxide layer. The interconnection pattern, usually consisting of aluminum having slight additions of silicon and copper, is then formed so that a direct contact between the metal and the doped silicon occurs in the contact hole.
With progressive miniaturization of the lateral structural dimensions, the penetration depth of the doped silicon regions to be contacted also usually becomes lower. With metal-oxide-semiconductor circuits (MOS) having 1 micron dimensions, it amounts to approximately 0.2 micron. On the other hand, there is a trend toward not reducing or only slightly reducing the thickness of the insulating layer and thus the depth of the contact holes so that parasitic capacitances can be kept as low as possible. For example, an insulation layer thickness of 1 micron can be desirable for MOS circuits having contact hole sizes of 1 micron.
As a result of these relationships in miniaturized circuits (low penetration depth, low contact hole area, deep contact holes) there arises a series of problems from the use of the aluminum contact known to the prior art, these problems being enumerated below with reference to an example of an n-channel MOS circuit.
(1) The film resistance of the diffused regions increases because of the lower penetration depth and degrades, for example, the transconductance of the MOS transistors.
(2) Silicon precipitation can occur in the contact holes when there is excess silicon in the aluminum. The precipitation results in an increased contact resistance when the dimensions of the contact holes become so small that they are on the order of the precipitated silicon crystallites or when the precipitated material epitaxially grows in the whole contact hole during subsequent heat treatments.
(3) With too low a silicon content in the aluminum, aluminum-silicon reactions occur in the contact hole. If the reaction zone extends locally down to the penetration depth of the diffused region, the pn-junction becomes shorted. This problem is intensified at low penetration depths.
(4) The electric current does not flow in the contact hole with uniform current density from the aluminum into the diffused region. On the contrary, current crowding that increases with a lower penetration depth of the diffused region occurs at the edge of the contact hole. This locally increased current density can lead to a material migration and to intense local heating in the contact hole area.
(5) With circuits having structures in the range of 1 micron, the aluminum interconnections must be etched with anisotropic etching methods in order to keep the underetching under the resist mask as slight as possible. Presently known anisotropic etching methods for aluminum such as plasma etching, reactive ion etching, and reactive ion beam etching, generally etch the silicon with a comparable etching rate or at least not with an etching rate that is lower by orders of magnitude. This leads to the result that the underlying silicon is also slightly eroded after the complete removal of the aluminum. With a low penetration depth of the diffused region, the region can be etched through down to the pn-junction whereby the electrical barrier properties of the pn-junction are degrated. Although it is in fact standard for aluminum interconnections in the circuits to completely cover the contact holes so that the described etching through a diffused region cannot occur, a single otherwise insignificant mask fault or somewhat too great an adjustment error when adjusting the aluminum mask can lead to the described effect and, potentially, to the failure of the overall circuit.
(6) Since the contact holes of miniaturized circuits can exhibit very low lateral dimensions (for example, 1 micron.times.1 micron) with a relatively great depth (for example, 1 micron) a greatly diminished metal coating in the contact hole and at the steep contact hole walls can occur during metal coating as a result of shadowing effects. This reduces the reliability of the circuits. The problem is even more serious where a multi-layer metallization is provided since, under certain conditions, each of the successive layers, metal layer and insulation layer, is affected by the problem.
The problems presented under items (1) and (3) can be eliminated or reduced by means of a silicide layer on the diffused regions, as discussed in an article by P. A. Gargini and I. Beinglass in the IEDM Digest, pages 54-57 (December 1981).
In connection with items (2), (3), (4) and (6), there is an article by S. Vaidya in the J. Appl. Phys. 39 (11), pages 900 to 902 (December 1981) wherein it is proposed to use a double layer of n.sup.+ -doped polysilicon and aluminum instead of aluminum containing approximately 1% silicon.
The problem of greatly diminished metal coating in the contact hole referred to under item (6) can also be relieved by the formation of sloped contact hole walls as discussed, for example, in an article by R. A. Moline in IEEE Trans. Electron. Dev., ED-20, page 804 (1973).